The semiconductor integrated circuit (IC) industry has experienced rapid growth. Over the course of the growth, functional density of the semiconductor devices has increased with decrease of device feature size or geometry. The scaling down process generally provides benefits by increasing production efficiency, reducing costs, and/or improving device performance. However, such scaling down has also increased complexity of the IC manufacturing processes.
With the demands on shrinking geometry of ICs, a non-planar field effect transistor (FET) is introduced. The non-planar FET has a semiconductor fin and a gate located on top of the semiconductor fin. However, device performance of such semiconductor device is still not satisfactory in advanced applications of technology. Therefore, improvements in structures and methods of forming a semiconductor device with better device performance continue to be sought.